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ILC7280
Micropower Dual 150mA CMOS RF LDOTM Regulators with 75dB Ripple Rejection
Features
* * * * * * * * * * * Guaranteed 150mA output per regulator Ultra low 150mV dropout at 150mA 1% output voltage accuracy Requires only 0.47F output capacitor Only 150A ground current at 150mA load 60dB ripple rejection at 1kHz (C OUT = 0.47F) 80VRMS noise at BW = 300Hz to 50kHz Excellent line and load transient response Over current / over temperature protection 8-pin MSOP package -60dB cross talk
Description
The ILC7280 is two independent 150mA low dropout (LDO) voltage regulators in an 8-pin MSOP package. Each regulator output is independently short circuit protected and has independent enable lines. The device offers a unique combination of low dropout voltage and low quiescent current of CMOS as well as the low noise and high ripple rejection characteristics of bipolar LDO regulators. Moreover, only one input capacitor is required. Dropout Voltage: Typically 150mV at 150mA load, and 1mV at 1mA load. Ground Pin Current: Typically 130A at 1mA load, and 135A at 150mA load. Ripple Rejection: 55dB at 1kHz and 60dB at 100kHz. Shutdown Mode: Less than 0.5A quiescent current in shutdown mode. Small Package: MSOP-8 Small Capacitor: Requires only a 0.47F external capacitor on the regulator output. Precision Output: Output voltage trimmed to 1% accuracy. Output Noise: 80VRMS, optional noise bypass capacitor at pin 3 will further reduce noise on VOUTA/B Voltage Pairings Available: 3.0/3.0V, 3.0/2.8V, 3.0/2.5V, 2.8/2.8V
Preliminary Information
Applications
* * * * Cellular Phones, pagers and wireless headsets Palmtops, organizers, PDAs and portable electronics Battery powered portable appliances and equipment Remote data accumulation and instrumentation
Typical Applications
V OUTA 0.47-2.2F ceramic V OUTB 0.47-2.2F ceramic + CNOISE 22pF
(optional)
V INA + GND + EN A V INB + EN B 1F ceramic 4.7F
Figure 1: Note: Enable may be connected to V IN, CNOISE is common to both LDOs
Rev. 1.9
PRELIMINARY INFORMATION describes products that are in the design stage. Specifications may change in any manner whatever without notice. Contact Fairchild Semiconductor for current information.
(c)2001 Fairchild Semiconductor Corporation
ILC7280
Pin Assignments
V OUTA GND V OUTB CNOISE(optional)
1 2 3 4 8 7 6 5
V INA EN A V INB EN B
MSOP
(TOP VIEW)
ILC7280CS-XXXX
Pin Definitions ILC7280
Preliminary Information
Pin Number
1 2
Pin Name VOUTA GND VOUTB CNOISE (optional) Regulator Output A Ground Regulator Output B
Pin Function Description
3 4
Voltage Reference Bypass: Connect external 22pF capacitor to GND to minimize output noise in regulator "A" or "B." May be left open. Do not ground. Enable/Shutdown B (input): CMOS compatible input. Logic high = enable, logic low or open = shutdown. Do not leave floating. Supply Input B (Internally connected to pin 8)* Enable/Shutdown A (Input): CMOS compatible input. Logic high = enable, logic low or open = shutdown. Do not leave floating. Supply Input A (Internally connected to pin 6)* Galvanic connection only.
5 6 7 8
ENB VINB ENA VINA
*If maximum current required from each regulator then connect both pin 6 and pin 8 to VDD
Absolute Maximum Ratings
Parameter Input Voltage S/D Input Voltage Output Current Output Voltage Power Dissipation Maximum Junction Temperature Storage Temperature ESD Rating Operating Input Voltage Operating Ambient Temperature Package Thermal Resistance VIN TA JA Symbol VIN VS/D IOUT VOUT PD TJ(max) Tstg Ratings -0.3 to +12 -0.3 to VIN Short circuit protected -0.3 to 10 Internally Limited 175 -40~+125 2 2.1 to 8 -40 to +85 200 Unit V mA V mW C C kV V C C/W
(c)2001 Fairchild Semiconductor Corporation
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ILC7280
Electrical Characteristics ILC7280CS
Unless otherwise specified, all limits are at A = 25C; VIN = VOUT(NOM) + 1V, IOUT = 1mA, COUT = 0.47F, V S/D = 2V. The * denotes specifications which apply over the specified operating temperature range. (Note 2) Parameter Output Voltage Output Voltage Output Voltage Line Regulation Dropout Voltage (Note 3) Symbol VOUT VOUT VOUT VOUT/VIN VIN - VOUT VIN - VOUT VIN - VOUT IGND IGND IGND IGND IGND IGND IS/D VS/D IOUT(peak) eN VOUT/VIN VOUT(line) Conditions IOUT = 1mA 1mA < IOUT < 100mA 1mA < IOUT < 100mA 1mA < IOUT < 150mA 1mA < IOUT < 150mA VOUT(NOM) + 1V < VIN < 10V * IOUT = 0mA * IOUT = 10mA * Dropout Voltage (Note 3) Ground Pin Current One regulator on Ground Pin Current One regulator on Ground Pin Current One regulator on Ground pin Current Both regulator on Ground pin Current Both regulator on Ground pin Current Both regulator on Shutdown Current Shut Down Input Voltage Peak Output Current (Note 4) Output Noise Voltage (RMS) Ripple Rejection Dynamic Line Regulation IOUT =150mA * IOUT = 0mA IOUT = 10mA IOUT = 150mA IOUT = 0mA IOUT = 10mA IOUT = 150mA * * * Min. -1 -2 -3 Typ. Max. Units VOUT +1 %V (Nom.) (Nom.) VOUT +2 %V (Nom.) (Nom.) VOUT +3 %V (Nom.) (Nom.) 0.007 0.014 %/V 0.032 0.1 1 mV 2 10 15 mV 20 150 175 mV 200 90 A 100 135 105 115 150 0.1 2.0 300 500 1 10 0.6 A A A A A A V mA V 60 60 60 10 dB mV
Preliminary Information
Dropout Voltage (Note 3)
High = Regulator On Low = Regulator Off VOUT > 0.95VOUT(NOM) BW = 300Hz to 50kHz, CNOISE = 0pF freq = 1kHz freq = 10kHz freq = 100kHz VIN: VOUT(NOM) + 1V to VOUT(NOM) + 2V; dVIN/dt = 1V/S;lo = 150mA IOUT: 0 to 150mA; d(lOUT)/dt = 50A/s, with COUT = 2.2F VOUT = 0V
Dynamic Load Regulation Short Circuit Current
VOUT(load) ISC
40 20 300
mV mA
(c)2001 Fairchild Semiconductor Corporation
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ILC7280
Notes: 1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical specifications do not apply when operating the device outside of its rated operating conditions. 2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods. Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing. 3. Dropout Voltage is defined as the measured Differential Voltage between input and output voltage, when the output voltage drops 2% below the nominal output voltage as V IN is decreased, and approaches VOUT. Nominal output voltage is defined at VIN = VOUT + 1V. 4. Guaranteed by design
Preliminary Information
VINA
VOUTA
+ ENA
CURRENT LIMIT THERMAL SHUTDOWN
*CNOISE
BANDGAP REF.
GND
CURRENT LIMIT THERMAL SHUTDOWN
ENB + -
VINB *Optional
VOUTB
(c)2001 Fairchild Semiconductor Corporation
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ILC7280
APPLICATIONS INFORMATION
+VIN A and B
These pins are connected internally through a galvanic connection for maximum power from each regulator, both VINA and VINB must be connected externally to VDD.
Output Capacitor
An output capacitor is required from VOUTA and VOUTB to GND to prevent oscillation and minimize the effect of load transient currents. The minimum size of the output capacitor(s) is dependent on the usage of C NOISE and its value. Without CNOISE, a minimum of 1F is recommended. For CNOISE = 22pF, a minimum of 2.2F is recommended (See figure 1). Larger values of output capacitance will slow the regulator's response during power up. The upper limit of capacitance is indefinite, however, it should have an equivalent series resistance (ESR) of approximately 5 or less and a series resonance above 1MHz. Stability is assured with the use of a capacitor having ultra-low ESR and as such will not produce low amplitude oscillations nor an underdamped transient response. This allows the use of modern ceramic capacitors in preference to their more costly Tantalum counterparts. If the system design calls for smaller load currents, lower capacitance may be used. Below 10mA the capacitance may be reduced to 0.47F and below 1mA to 0.33F
Enable/Shutdown
Forcing ENA and/or ENB to a voltage greater than 2V, enables the regulator(s). These inputs are CMOS logic compatible gates. If this feature is not required, connect ENA and/or ENB to VIN. Note that VINA and VINB are connected internally. To minimize the effect of imbalanced current sharing and possible noise, both VINA and VINB should also be connected externally.
Preliminary Information
Input Capacitor
A 1F capacitor should be placed from V INA/B to GND if there is more than 10 inches of wire between the input and the ac filter capacitor or if a battery is used as the input.
Reference Bypass Capacitor
CNOISE (the reference voltage bypass capacitor) is connected to the internal VREF which is common to regulator's A and B. A 22pF capacitor connected between C NOISE and GND decouples the reference output voltage and provides a significant reduction in regulator output noise. An effect of CNOISE also reduces the regulator phase margin. When using CNOISE, output capacitors of 2.2F or greater are required to maintain stability. Also affected by CNOISE is the start up speed of the ICL7280. The speed is inversely proportional to the value of CNOISE. If a slow or delayed start up time is desired, a larger value of CNOISE is used. Conversely, faster start up times or instanton applications will require smaller values of C NOISE or its omission with the pin left open. The trade-off of noise to response should be considered.
No-Load Stability
The ILC7280 will remain stable and in regulation with no load current. These are desirable performance features for applications such as keep-alive modes in CMOS systems.
Split-Supply Operation
When using the ILC7280 in a system requiring that the load be returned to the negative voltage source, the output(s) must be diode clamped to inhibit significant voltage excursions below ground. A simple external diode clamp to ground will afford protection from damage to the device. (See figure below).
+V IN
VOUTA or VOUTB
ILC7280
EN A /EN B Dual Regulator Dext Rload
-V IN External Diode, Dext inhibits significant voltage excursions below ground in a split power supply load return.
(c)2001 Fairchild Semiconductor Corporation
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ILC7280
APPLICATIONS INFORMATION (continued)
Thermal Considerations
For optimum Thermal dissipation and device reliability, devices mounted on conventional FR4 PCB material should be surrounded and connected to as much ground copper as possible. In a worse case application with minimum trace widths and no ground plane, the MSOP-8 package exhibits a thermal resistance of 200 C/W. The risk to the device can be calculated in the following examples. (An Excel spreadsheet calculator is also available at the Impala Linear web site: Products/ILC7280.)
Thermal Evaluation Examples
For an ambient temperature of 50C, the maximum package power dissipation is:
Preliminary Information
P D(max) = (125C - 50C) / 200C/W P D(max) = 375mW If the intent is to operate from a 4V power source with a 150mA load current from both outputs at a 50C ambient temperature, the expected power dissipation is found in the following calculation: P D(each regulator) = (VIN - VOUT) * IOUT + (VIN * IGND) P D(each regulator) = (4V - 3V) * 150mA + (4V * 0.12mA) P D(each regulator) = 150mW P D(both regulators) = 2 * 150mW P D(both regulators) = 300mW In this example the total power dissipated is 300mW which is below the 375mW maximum package consideration and therefore safe to operate. It should be noted that it is not always possible to operate both regulators at the maximum output current. For example in a 5V input and 3V output application at 50C, one regulator operating at 150ma would dissipate 267.5mW. The remaining regulator must be limited to 375mW - 267.5mW or 107.5mW. An advantage of the ILC7280 low-dropout voltage characteristic is that using the lowest possible input voltage can minimize power dissipation.
(c)2001 Fairchild Semiconductor Corporation
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ILC7280
Package Dimensions
MSOP-8
0.122 (3.1) 0.114 (2.9)
Pin 1 identifier
0.122 (3.1) 0.114 (2.9)
0.244 (5.15) 0.228 (4.65)
0.025 (.65)BSC 0.009 (.23) 0.005 (.13)
Preliminary Information
0.043 (1.1) 0.031 (.80)
(0-10)
0.016 (.40) 0.01 (.25)
0.006 (.15) 0.004 (.05)
0.027 (.70) 0.016 (.40)
Ordering Information
Product Number ILC7280CS-2530 ILC7280CS-3028 ILC7280CS-2828 ILC7280CS-3030 ILC7280CS-3025 Package 150mA 2.5V and 3.0V LDO regulators 150mA 3.0V and 2.8V LDO regulators 150mA 2.8V and 2.8V LDO regulators 150mA 3.0V and 3.0V LDO regulators 150mA 3.0V and 2.5V LDO regulators
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 10/15/01 0.0m 001 Stock#DSxxxxxxxx 2001 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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